A high-resolution analog front-end with dB-linear VGA for enhanced dynamic range in 22-nm FD-SOI process

This paper proposes a high-resolution analog front-end (AFE) integrating a low-noise transimpedance amplifier (TIA), a variable-gain amplifier (VGA), and a second-order 1-bit delta-sigma analog-to-digital converter (Δ-Σ ADC) followed by a three-stage digital decimation filter, realizing a resolution of 24-bit. Implemented in 22-nm fully depleted silicon-on-insulator (FD-SOI) process, the proposed AFE achieves 14.9-bit effective number of bits (ENOB) within 10 kHz bandwidth, 160 dB common-mode rejection ratio (CMRR), and 0.62 pA current resolution. Benefiting from the superior isolation of the FD-SOI process, the proposed design offers efficient multi-channel scalability while preserving exceptional noise performance and dynamic range.