Unfavorable Strides in Cache Memory Systems (RNR Technical Report RNR‐92‐015)

An important issue in obtaining high performance on a scientific application running on a cache‐based computer system is the behavior of the cache when data are accessed at a constant stride. Others who have discussed this issue have noted an odd phenomenon in such situations: A few particular innocent‐looking strides result in sharply reduced cache efficiency. In this article, this problem is analyzed, and a simple formula is presented that accurately gives the cache efficiency for various cache parameters and data strides.