A Neural Surrogate for Accelerated Multi-Topology Analog Circuit Simulation

• Single shared neural surrogate emulates 21 heterogeneous analog circuit topologies • Mean NRMSE of 8.39% on held-out test set; inference at 0.127 ms/sample on RTX 5090 • Mean speed-up of 38,000 over single-core ODE simulation across 21 topologies • 176,100-sample multi-topology waveform dataset spanning five circuit families • Ablation confirms L1-only TCN outperforms spectral loss variants across all families Analog circuit simulation with numerical ODE solvers is reliable, but repeated transient analysis can be too slow for parameter sweeps, tolerance studies, and design iteration. This paper presents a single shared neural surrogate trained to emulate transient waveforms across 21 analog circuit topologies . A dataset of 176100 simulated waveform pairs is constructed, spanning passive filters, diode and transistor circuits, operational amplifier stages, and switching converters. The surrogate reaches a mean NRMSE of 8.39% across all topologies on the held-out test set. After training, inference takes 0.127 ms per sample on an RTX 5090, compared with milliseconds to tens of seconds per sample for the reference ODE solver on a single CPU core, corresponding to a mean speed-up of about ∼ 38, 000 × across the library. A full-dataset ablation study evaluates the effect of training loss design and backbone architecture choice.