A fixed transconductance bias technique for CMOS analog integrated circuits

A fixed transconductance bias circuit technique is proposed. This circuit forces the transconductance of a MOSFET operating in saturation to track the conductance of a precise off-chip resistor. Unlike its predecessors, the operation of this circuit does not depend on the square law of the MOSFET, and its performance does not degrade with variations in supply voltage and temperature. Simulation results in a 0.35 /spl mu/m CMOS process are given.