1.1 TMACS/mW Load-Balanced Resonant Charge-Recycling Array Processor

A resonant adiabatic mixed-signal 128 × 256 array processor achieves 1.1 TMACS (10 12 multiply-accumulates per second) per mW of power from a 1.6V DC supply. The 1.9 m times 9 m 3T NMOS unit cell with single-wire pitch multiplexed bit/compute line provides charge-conserving lb-lb multiplication and single-wire analog accumulation. A stochastic data modulation scheme minimizes on-chip capacitance variability maintaining clock oscillations near resonance.