This work presents an SRAM-based analog reconfigurable computing-in-memory macro with 409.6-GOPS throughput and 460.22-TOPS/W energy efficiency. The proposed reconfigurable macro supports 1 / 2 / 4 / 8 ~b inputs and 1 / 2 / 4 / 8 ~b signed weights while maintaining 100% memory utilization. Furthermore, we propose (i) a dual-domain DAC to achieve high-precision input with low area overhead and (ii) an input-sense-and-skip SAR ADC, which reduces the average power overhead by 54% compared with conventional SAR ADC.
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Choi et al. (2024) studied this question.
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