The application of short-time memory devices to compensator design

IN FIG. 1 is shown a compensator cascaded with a control system. The combination will be called the compensated system. In this paper the transfer function of the control system is assumed to be linear and that for the compensator is at least piecewise linear. Each compensator discussed in the paper has incorporated, within its structure, a delay line or short-time memory unit, Fig. 2, into which information is inserted and from which the same information is extracted at various short intervals of time thereafter. The extracted information at each location is multiplied by a suitable constant and the results are summed to form rx(t).