This paper presents one of the first comprehensive studies comparing the electrical performance of through-silicon-vias (TSVs) in silicon with through-package-vias (TPVs) in glass, considering electromagnetic field distributions, 50 ohm impedance design, and the effect of via taper. First, the electric and magnetic field distributions were analyzed using a 3D EM solver (CST Microwave Studio) for the scenario of a signal via adjacent to a return via, to study the differences in the field distributions for TSVs and TPVs. Next, the design for 50 Ω impedance matching was studied with various ground-via configurations for TSVs in silicon and TPVs in glass. It was found that additional ground vias improved the impedance matching to 50 Ω in the high frequency above 40 GHz. Finally, the effect of the via taper on the impedance and insertion loss of TSVs and TPVs was studied, concluding that taper has a positive impact in the case of TSVs in lossy silicon at low frequencies as it reduces the parasitic capacitance while taper has a negative impact in the case of TSVs in intrinsic silicon and TPVs in glass, as it increases the parasitic inductance.
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Tong et al. (2016) studied this question.