Recently, we have suggested highly manufacturable and reliable 3D NAND flash cell called “SMArT”[1], which is intended to minimize both stack height and word line resistance. Because the storage node of this cell is charge trap nitride, its device characteristics were far different from conventional floating gate. In this paper, the key cell characteristics such as cell Vth distribution, disturbance, and reliability are compared with our FG cell of 2y node in chip level, and several future challenges for 3D era will be addressed.
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Choi et al. (2012) studied this question.
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