VLSI-placement with a neural network model

A placement algorithm based on an extension of neural network models suggested by T. Kohonen (1982) and H. Ritter (1986) is proposed. The approach combines the characteristics of the placement problem with the mapping property of a neural model. The relation between movable modules and slots on a chip is met by an algorithm able to establish topology maps between an input space (sensory source) and an output space (cortical area). The neural network model is programmed in C language and implemented on a VAX 11/750 computer. The results obtained seem to exceed those of classical placement algorithms like force-directed relaxation and simulated annealing in efficiency and computation time.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>