We demonstrate a nonvolatile single transistor ferroelectric gate memory device with ultra-thin (5.5 nm) Hf 0.8 Zr 0.2 O 2 (HZO) fabricated using a self-aligned gate last process. The FETs are fabricated using silicon-on-insulator wafers, and the ferroelectric is deposited with atomic layer deposition. The reported devices have an ON/OFF drain current ratio of up to 10 6 , a read endurance of <tex-math notation="LaTeX">>10¹⁰ </tex-math> read cycles, and a program/erase endurance of 10 7 cycles. Furthermore, healing of the transistor after gate insulator breakdown is demonstrated.
No takes yet. Share an insight, caveat, or question.
Chatterjee et al. (2017) studied this question.
Synapse has enriched 3 closely related papers on similar clinical questions. Consider them for comparative context: