A formalism is presented for specification and analysis of real-time constraints of systems at run time. Real-time logic (RTL) is employed to illustrate how timing properties can be specified elegantly in the form of annotation added to a program (or to a design specification). The algorithms for detecting a violation of a timing property at runtime, expressed in RTL, are presented.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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Jahanian et al. (2002) studied this question.
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