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An SRAM-based mixed-signal current-domain Compute-In-Memory (CIM) macro is presented that extracts low-dimensional digital features from high-dimensional analog inputs (Analog Feature Extraction, AFE). A prototype AFECIM chip in 28nm CMOS extracts 16-channel (S-bit) digital features from 128-channel analog input (8× dimension reduction). The chip consumes 71.25 mW at a throughput of 600 Mega-Sample-Per-Second (MSPS, a sample is 128-analog input) achieving 43.7 TOPS/W peak energy efficiency and 120 TOPS/mm² peak computation density.
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Sharma et al. (2023) studied this question.
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