Answers are grounded in this paper and cite their sources.
A method for modeling the variations in defect levels in circuits produced on modern integrated circuit manufacturing lines is described in this paper. The effects on defect and fault distributions are derived. A deficiency in some previous yield models is eliminated.
No takes yet. Share an insight, caveat, or question.
C.H. Stapper (1985) studied this question.
Synapse has enriched 10 related papers. Consider them for comparative context: