Sub-10 ps Logic Operations in Josephson Four-Junction Logic (4JL) Gates

Sub-10 ps logic delays have been obtained in a Josephson four junction logic (4JL) gate. An experimental circuit including a logic chain of ten 4JL gates whose minimum junction size is 2.5 µm square has been fabricated using a Pb-alloy integration technology. The shortest switching delay has been measured to be 7 ps/gate for the fanout of 1 with a power dissipation of 4 µW/gate.