In this paper, we presen t the design and use of a comprehensiv e framework, SimplePower, for evaluating the e ect of high-level algorithmic, architectural, and compilation tradeo s on energy. An execution-driven, cycle-accurate RT lev el energy estimation tool that uses transition sensitive energy models forms the cornerstone of this framework. Simple-Power also pro vides the energy consumed in the memory system and on-chip buses using analytical energy models.
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Ye et al. (2000) studied this question.