Fault-tolerant interfaces for modular quantum computing on diverse qubit platforms

Modular architectures offer a scalable path toward fault-tolerant quantum computing by interconnecting smaller quantum processing units provided that high-rate, fault-tolerant interfaces can be realized across modules. We present a comprehensive analysis and comparison of known methods for establishing such interfaces, including lattice surgery, transversal gates, and grow-and-distill protocols based on code growing and logical distillation. Using the surface code, we identify optimal interface strategies across a wide range of hardware parameters, such as gate fidelities, entangling rates, and memory resources, and estimate the requirements to achieve logical error rates of <a:math xmlns:a="http://www.w3.org/1998/Math/MathML"> <a:msup> <a:mn>10</a:mn> <a:mrow> <a:mo>−</a:mo> <a:mn>6</a:mn> </a:mrow> </a:msup> </a:math> and <b:math xmlns:b="http://www.w3.org/1998/Math/MathML"> <b:msup> <b:mn>10</b:mn> <b:mrow> <b:mo>−</b:mo> <b:mn>12</b:mn> </b:mrow> </b:msup> </b:math> . Our results establish when the interface becomes a bottleneck in the computation and provide guidance for experimental implementations with superconducting, atomic, and solid-state hardware.