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October 1, 2016

Hardware-based FIR filter implementations for ECG signal denoising: A monitoring framework from industrial electronics perspective

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Population

ECG signals

Comparison

Three different finite impulse response filter… vs Comparison among the three filter implementations

Design

Other

Key result

The pipelined MAC implementation of FIR filters for ECG denoising required the least resources and operated at the highest performance compared to regular and pipelined architectures.

Authors

SASalam Al-KhammasiKAKhald A. I. AboalayonMDMohammad Daneshzand

Discussion

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Overview

May enable efficient ECG denoising hardware; leaves open clinical validation before practice adoption.

Structured PICO

P
Population
ECG signals
I
Intervention
Three different finite impulse response (FIR) filter implementations (regular, pipelined, and pipelined multiply-accumulate [MAC]) designed using VHDL and Quartus II
C
Comparator
Comparison among the three filter implementations
O
Outcome
Resource utilization and maximum operating frequency

A pipelined MAC implementation of FIR filters for ECG denoising offers the best balance of low resource utilization and high operating frequency, despite increased design complexity.

Limitations

  • Complexity of the pipelined MAC implementation

Cite This Study

Al-Khammasi et al. (2016) studied ECG signal noise. FIR filter implementations (regular, pipelined, pipelined MAC) was evaluated on Resource utilization and maximum operating frequency. The pipelined MAC implementation of FIR filters for ECG denoising required the least resources and operated at the highest performance compared to regular and pipelined architectures.

synapsesocial.com/papers/6a1ff4983f3a87967f2e5fc6https://doi.org/10.1109/ct-ieta.2016.7868243
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