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Device and array design considerations are described for a manufacturable 120-nsec cycle magnetic film memory containing 600,000 bits in the basic operating module. Worst-case testing is done in such a way as to provide quantitative values for such effects as adjacent bit-line stray field, ground-plane current spreading, flux trapping in metallic ground planes and strip lines, and magnetic-keeper efficiency. Worst-case output signals exceeding 3.8 mV are achieved with a 8-nsec rise-time word pulse of 510 mA. Bit current is 100 mA.
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Pugh et al. (1967) studied this question.
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