A solid state 3D scanner based on a pulsed laser diode source and narrow time gating of a 2D CMOS single photon avalanche diode (SPAD) detector array is presented. The imager uses an on-chip delay-locked loop to program the time gating of 40 sub-arrays individually. The prototype detector has 80 × 25 pixels with a fill factor of 32 % in the sensor area. The chip has been fabricated in a 0.35 μm high-voltage process and occupies a 5.69 × 5.02 mm 2 area. A 3D range image rate of ~5 frames/second with centimeter level precision is demonstrated to passive targets within a range of ~1 meter and FOV of 36 × 57 degrees.
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Ruokamo et al. (2017) studied this question.
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