A Self-Testing and Self-Repairing Structure for Ultra-Large Capacity Memories

This paper presents a self-testing and self-repairing strategy for ultra-high capacity memories. The self-testing and self-repairing structure allows ultralarge scale memory chips to perform tests, locate faults, and repair itself without any external assistance from either test engineers or test equipment. This will drastically improve the functional yield and reduce the production cost. The efficiency of self-testing and self-repairing strategy is supported by a hierarchical memory organization.