A novel discrete-time frequency-locked loop (FLL) for three-phase grid-connected power converters that features rapid dynamic response and low computational cost is introduced. Firstly, a simplified nonlinear frequency-estimation model that leverages the inherent orthogonality of voltage signals in the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">a</tex>β- frame, along with an optimal fixed-length delay, is proposed. Subsequently, a discrete-time FLL structure is developed based on this model. In addition, a convergence analysis and parameter design are presented. Finally, a comparative experiment with established methods is conducted, and the results demonstrate that the proposed FLL offers a faster dynamic response, requires fewer parameters to be tuned, ensures a smoother startup process, and maintains a relatively lower computational cost.
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Yu et al. (2025) studied this question.
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