Dead-Time Compensation to Reduce the Common Mode Voltage in a Three-Phase Four-Leg Inverter

This paper presents a novel digital control to mitigate the common mode voltage (CMV) produced by the switching events of a four-leg grid-following voltage source inverter (VSI). The inverter ideally does not produce CMV in the switching frequency range because the switching updates occur simultaneously for all four legs, however the dead-time insertion during commutation causes some CMV at the switching frequency and at its harmonics. The proposed dead-time compensation strategy reduces the CMV produced by dead-time, lowering the conducted EMI measured in the CE102 frequency range of MIL-STD-461G. This method is demonstrated with control hardware in the loop simulations and is experimentally validated on a laboratory VSI built with SiC MOSFETs and controlled by a field programmable gate array.