We present major breakthroughs in MTJ design for STT-MRAM applications allowing reliable write for pulse lengths down to 1.5ns, data retention up to 125°C for 10 years and full compatibility with BEOL process up to 400°C for 1 hour. We have successfully integrated the novel structure onto an 8Mbit test chip. We demonstrate writing of every single cell in the array using sub-5ns pulses over a wide temperature range without using any error correction. We also show that sensing times of 4ns are sufficient to read every data cell. The inherent scalability of the design makes it a prime candidate for universal embedded non-volatile memories down to the 28nm node and beyond.
No takes yet. Share an insight, caveat, or question.
Jan et al. (2014) studied this question.
Synapse has enriched one closely related paper. Consider it for comparative context: