Chip-level wireless power transfer scheme design for next generation wireless interconnected three-dimensional integrated circuits

In this paper, we propose chip-level wireless power transfer (WPT) scheme for the next generation high density wireless three-dimensional (3-D) semiconductor packaging technology. We designed a transmitter coil on an active silicon interposer embedded in a PCB-package and a receiver coil on a processor die. The proposed WPT scheme used magnetic-field resonance coupling for high power transfer efficiency. We fabricated a full-bridge rectifier and a low-dropout regulator (LDO) to make a stable DC power for a voltage-controlled oscillator (VCO) on the processor die using SK/Hynix 0.18 μm CMOS process. A VCO is key circuit block consisting of a PLL for clock generation to synchronize data transfer between a processor and a memory controller. The designed VCO successfully generated 1.6 GHz signal using the power from the proposed chiplevel WPT scheme.