Voltage-Mode Digital Pulse Skipping Control of a DC–DC Converter With Stable Periodic Behavior and Improved Light-Load Efficiency

A pulse skipping modulation (PSM) technique improves the light load efficiency in a dc-dc converter by selectively skipping a few clock pulses. However, in existing PSM schemes, the number of charge and/or skipped cycles cannot be predefined. Therefore, it is difficult to predict the ripple parameters and ensure a stable periodic behavior. Further, it becomes difficult to further minimize power losses under light load conditions. This paper proposes a voltage-mode digital pulse skipping modulator which uses a digital pulse-width-modulator (PWM) as a building block, thus making it easy to operate the system in both PWM and PSM modes. Unlike in existing PSM schemes, the sequence and the count of charge and skip cycles can be fully prespecified in the proposed scheme, with the number of skip cycles optimally chosen to maximize the efficiency. Stability analysis is carried out using discrete-time modeling, which provides guidelines to ensure a stable periodic operation with predictable ripple parameters. Small-signal modeling and design of the proposed PSM scheme are discussed. A prototype buck converter was fabricated and tested. The proposed control scheme is implemented using an FPGA device, and the experimental results fully support the analytical predictions.