On-Chip Diplexer at E-Band 83/95 GHz

This paper presents a fully integrated E-band (83/95 GHz) diplexer realized in STMicroelectronics’ BiCMOS 55 nm technology. The design directly addresses the critical trade-off between miniaturization and the performance required for high-frequency on-chip systems. The key innovation is a novel patch resonator optimally exploiting the multi-layer structure of the technology’s Back-End-Of-Line. It achieves significant compactness by jointly combining two distinct miniaturization techniques: slotted structures and mushroom-type capacitive loading. This method results in an impressive 77% size reduction compared to conventional designs. Furthermore, we introduce precisely controlled transmission zeros (TZs) to maximize inter-band isolation. The fabricated diplexer achieves a remarkably narrow fractional bandwidth (FBW) of 8.2%—the lowest reported to date for integrated BiCMOS/CMOS E-band implementations—and a robust inter-band isolation exceeding 25 dB, while demonstrating excellent return loss (better than 25 dB). Hence, this work validates a highly compact and scalable approach for integrated E-band transceivers, paving the way for future 6G front-end applications.