A 10-b binary-weighted D/A digital-to-analog converter based on current division is presented. The effective resolution bandwidth is 5 MHz at a maximum clock frequency of 40 MHz. The circuit is integrated in a 0.8- mu m double-metal CMOS technology and the chip area is 0.4 mm/sup 2/. This particular converter was realized by constructing the bit currents through a careful combination of unit current sources and by limiting the driving voltage on the gates of the current switches.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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Bastiaansen et al. (1991) studied this question.
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