A Scalable, CMOS‐Compatible Assembly of Ambipolar Semiconducting Single‐Walled Carbon Nanotube Devices

Semiconducting single-walled carbon nanotubes are integrated into high-density arrays using dielectrophoresis, which is a CMOS-compatible, bottom-up assembly technique. The devices are statistically analyzed by voltage-contrast scanning electron microscopy and electron transport measurements. Annealing and the choice of parylene substrate are shown to improve device performance. Detailed facts of importance to specialist readers are published as ”Supporting Information”. Such documents are peer-reviewed, but not copy-edited or typeset. They are made available as submitted by the authors. Please note: The publisher is not responsible for the content or functionality of any supporting information supplied by the authors. Any queries (other than missing content) should be directed to the corresponding author for the article.