This paper proposes an intra-iterative interference cancellation (IIC) detector based on convex optimization for large-scale MIMO systems. By utilizing Newton's method to solve the optimization problem, a hardware-friendly detector is implemented in a 65 nm CMOS technology. The proposed detector has a throughput of 3.6 Gb/s with a 600 MHz operating frequency. The simulation results indicate that the block-error rate (BLER) performance of the proposed method can approach that of the minimum mean square error (MMSE) detector. The design is found to be more efficient than other recently proposed MIMO detector implementations.
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Chen et al. (2016) studied this question.
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