Focal-plane analog VLSI cellular implementation of the boundary contour system

We present an analog very large scale integration (VLSI) cellular architecture implementing a version of the boundary contour system (BCS) for real-time focal-plane image processing. Inspired by neuromorphic models across the retina and several layers of visual cortex, the design integrates in each pixel the functions of phototransduction and simple cells, complex cells, hypercomplex cells, and bipole cells in each of three directions interconnected on a hexagonal grid. Analog current-mode complementary metal-oxide-semiconductor (CMOS) circuits are used throughout to perform edge detection, local inhibition, directionally selective long-range diffusive kernels, and renormalizing global gain control. Experimental results from a fabricated 12/spl times/10 pixel prototype in a 1.2-/spl mu/m CMOS process are included, demonstrating the robustness of the implemented BCS model in selecting image contours in a cluttered and noisy background.