Demonstrates low-power in-sensor computing for image processing, indicating efficient visual information handling.
The physical separation of sensing and processing units in traditional vision systems creates latency and energy-efficiency bottlenecks. In-sensor computing, capable of processing visual information directly in the analog domain, offers a promising solution. Herein, we report a high-performance, gate-tunable GeSe/MoSe2 van der Waals heterostructure designed for simultaneous light sensing and in-sensor computing. By engineering a Type-II band alignment at the heterointerface, the device achieves efficient charge separation, thereby enabling the suppression of dark current and effective gate tunability. Crucially, we propose a physics-based quantitative weight mapping strategy that utilizes the zero-gate voltage state as a standardized baseline, enabling the linear and robust modulation of convolution weights. Leveraging this strategy, we demonstrate low-power in-sensor convolution operations for edge detection and image sharpening with high fidelity. This work not only showcases the potential of GeSe-based heterostructures for optoelectronics but also provides a rigorous methodology for bridging the gap between nonlinear device physics and linear neural network algorithms.
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Yang et al. (2026) studied this question.
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