Examines electrochemical performance of vanadium oxide under different annealing environments, suggesting optimal processing methods.
This study investigates the profound impact of annealing environments such as conventional (C5), microwave (M5), and vacuum (V5) annealing on the structural, morphological, and electrochemical properties of vanadium oxides. XRD and XPS analyses confirm that conventional and microwave annealing preserve the phase-pure V 2 O 5 stoichiometry while, vacuum annealing induces a mixed-valence state (V 5+ /V 4+ ) and a high density of oxygen vacancies. FESEM reveal that microwave annealing restricts grain growth to an average particle size of about 180 nm, whereas vacuum annealing promotes significant coarsening to 350 nm. EIS and CV demonstrate a critical trade-off between kinetic efficiency and charge storage capacity. The C5 sample emerged as the optimal candidate, delivering a superior specific capacitance of 186 F g⁻¹ and a robust pseudocapacitive response with a high-frequency phase angle of 75° This superior performance is validated by a low R ct of 191 kΩ and a b value of 0.79, signifying a surface-controlled kinetic mechanism. The M5 sample was limited by a high R ct (564 kΩ) due to high density of grain boundaries. On the other hand, V5 sample faced diffusion-limited constraints (b = 0.69) despite enhanced electronic conductivity which can be attributed to its larger particle size and mixed oxide states. Continuous galvanostatic cycling over 5,000 cycles demonstrated that the highly crystalline C5 maintains a steady, predictable retention of 60% while M5 and V5 show electro-activation behaviour. These findings suggest a synergistic trade-off in processing, where vacuum-induced defect engineering significantly enhances electronic conductivity, whereas conventional and microwave methods ensure the structural integrity and optimal grain morphology required for superior pseudocapacitive charge storage.
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Charlotte et al. (2026) studied this question.
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