Study designs a TRNG utilizing ADPLL for high entropy in secure AES key generation, suggesting robustness in embedded systems.
True Random Number Generators (TRNGs) are essential for secure cryptographic systems, particularly for generating unpredictable keys in Advanced Encryption Standard (AES) applications. This work presents the design of an All-Digital Phase-Locked Loop (ADPLL) assisted multi-ring oscillator (MRO) based TRNG to achieve high entropy and improved stability. The proposed architecture utilizes multiple ring oscillators as entropy sources, exploiting intrinsic timing jitter and process variations. The ADPLL regulates oscillator behavior, minimizes frequency drift, and prevents mutual locking, thereby enhancing randomness quality. Outputs from the oscillators are combined using XOR-based techniques and sampled through a flip-flop to extract random bits. A lightweight post-processing unit is incorporated to reduce bias and improve statistical properties. The generated bitstream demonstrates high entropy and passes standard randomness tests. The proposed TRNG is suitable for secure AES key generation in hardware-constrained environments such as embedded systems and IoT devices due to its scalability, low complexity, and robustness.
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Natarajan et al. (2026) studied this question.
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