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Power consumption is the most difficult challenge for CMOS integrated circuits. Here, we demonstrate experimentally a novel steep turn-on pMOSFET for low-voltage operation for the first time, which exhibits 5-60 mV/decade SS, wide voltage range for , sturdy SS at 85°C, faster transistor turn-on at above threshold voltage, and lower off-state leakage by greater than three orders of magnitude. Such improved leakage current is crucial to decrease the OFF-state leakage current in sub-1X nm CMOS. This was achieved using ferroelectric high-κ ZrHfO gate dielectric pMOSFET.
Cheng et al. (Fri,) studied this question.