FPGA-based implementation of the SRF-PLL for critical power electronics applications

In critical power electronic systems, such as Uninterruptible Power Supplies (UPS) and energy storage systems, precise and rapid grid synchronization is essential. This paper presents a hardware implementation of the Synchronous Reference Frame Phase-Locked Loop (SRF-PLL) implemented in a Field-Programmable Gate Array (FPGA). The study discusses architectural details of the SRF-PLL implementation of fixed-point arithmetic aimed at optimizing resource utilization. Validation tests confirm the effectiveness and robustness of the proposed solution under dynamic grid conditions. The results confirm the suitability for high-reliability applications.