Physical Unclonable Function Based on 3D‐NAND Flash Array Structure With Multi‐Chip Implementation

As a promising hardware‐based security primitive, physical unclonable functions (PUFs) exploit stochastic, process‐induced variations in physical properties to generate unique and unclonable device fingerprints. However, conventional CMOS‐based PUFs require large and complex circuitry, leading to increased area and power consumption. To address this, we propose a PUF based on a 3D‐NAND flash array utilizing intrinsic string current variations. Unlike prior write‐based approaches, it employs read operations for CRP extraction, thereby avoiding stress‐induced degradation. Challenges are applied via string select lines and bitlines, while each wordline functions as an independent PUF chip. A 1‐bit response is generated by comparing summed string currents. Thanks to the high cell density of 3D‐NAND flash, multiple stacked PUF chips with an exponentially large CRP capacity can be integrated into a single array. We fabricated 48 × 24 planar NAND flash arrays using charge‐trap flash, confirming current variability due to process variation and randomly formed poly‐Si grain boundaries. A 48 × 24 × 8 3D‐NAND PUF was implemented using measured data, achieving near‐ideal PUF metrics and passing autocorrelation analysis, all 16 NIST statistical tests and ML attack simulations. These results highlight the potential of 3D‐NAND flash for scalable, reliable hardware security.