Optimized Situational-aware Multi-graph Convolutional Recurrent Network using Pre Synthesis and Post Synthesis Power Estimation of VLSI Circuits

VLSI technologies allow the integration of millions of transistors onto a single chip. Early power estimation is crucial in VLSI circuits as it plays a key role in ensuring their reliability. However, VLSI circuits are often prone to inefficiencies due to underdeveloped power estimation methods, with conventional techniques frequently suffering from low accuracy and slow processing. Timely and precise power estimation is essential to minimize issues and enhance the reliability of VLSI designs. To overcome these complications, Optimized Situational-aware Multi-graph Convolutional Recurrent Network using Pre Synthesis and Post Synthesis Power Estimation of VLSI Circuits (SMCRN-PSPSPE-VLSIC) is proposed. Then input data is collected from ISCAS 89 Dataset. Then, input data is fed to SMCRN for PSPSPE of the VLSI circuit. Pre-synthesis estimates are generated early in the design process, before the circuit's physical layout is completed. Post-synthesis estimates, on the other hand, are made after the layout, when more detailed information about the circuit is accessible. To enhance accuracy, the Adam-Dingo Optimization Algorithm (ADOA) is utilized to optimize SMCRN parameters that help to enhance the overall power estimation. The performance metrics likes mean absolute error, mean absolute percentage error, root mean square error, mean square error, determination of coefficient are evaluated. The SMCRN-PSPSPE-VLSIC technique is implemented in python. The proposed technique attains 26.36%, 20.69% and 30.29% higher determination of coefficient, 19.12%, 28.32%, 27.84% higher accuracy, 12.04%, 13.45%, 22.80% higher mean absolute error and 20.47%, 16.34%, and 20.50% higher root mean square error compared with existing methods such as PSPSPE of VLSI Circuits Utilizing ML Method (PSPSPE-VLSI-RF), presented an efficient technique for faults diagnosis in analog circuits dependent on ML classifiers (FD-AC-SVM),PACOSYT: A passive component synthesis tool dependent on ML and tailored modeling strategies towards optimal RF and mm-Wave circuit designs (PCS-WCD-ANN) respectively.