Demonstrates a novel computing architecture in silicon alternatives, suggesting breakthroughs in execution efficiency.
This paper presents the Hybrid Electro-Optic Model Architecture (HEOMA), a non-von Neumann, clockless computing architecture designed to bypass the physical scaling limits of traditional silicon-based accelerators. By embedding computational execution directly into the transmission medium, execution order emerges natively from the physical geometry of wave propagation, entirely eliminating global clock distribution networks, synchronization overhead, and related dynamic power dissipation. The architecture is organized into three macro-structural sectors: an electro-optic input mapping fabric, a spatial wave-propagation routing medium, and a non-volatile phase-change material (PCM) output state-preservation sector. While initially scoped as a domain-specific accelerator for single-expression evaluation, the inclusion of non-volatile phase-change memory interfaces suggests a possible pathway toward stateful, multi-instruction execution; realizing this extension remains an open architectural problem and is identified explicitly as future work rather than a resolved capability of the present design. We validate the underlying wave-propagation physics using Finite-Difference Time-Domain (FDTD) simulations via MEEP, demonstrating spatial wavefront interference as a viable logic mechanism. Finally, we provide formal analytical derivations for a solitary-junction Arithmetic Logic Unit (ALU) operating across linear, viscous, and saturation regimes (χ(1) , χ(2) , χ(3) non-linearities) to execute fundamental arithmetic operations---including addition, subtraction, multiplication, and an analytically derived transient carrier decay division mechanism---as the structural payoff of the architecture.
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K R Naga Abishe Kumar (2026) studied this question.
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