The power density of modern high-power integrated processors keeps rising rapidly. Among them, chiplet-based high-power AI accelerators exhibit local peak heat flux exceeding 1 kW/cm2, which leads to concentrated hotspots, severe internal temperature gradients, device performance degradation and reliability deterioration. Conventional heat dissipation approaches are limited by the bottleneck of series interfacial thermal resistance and fail to meet the cooling demands of complex integrated architectures. Chip-level thermal management serves as a core method to suppress hotspots near heat sources and reduce overall system thermal resistance, which guarantees long-term stable operation of high-power integrated processors and plays a vital role in improving the energy efficiency and service life of computing platforms. This paper systematically reviews mainstream chip-level thermal management technologies for high-power integrated processors, covering heterogeneous integration of high-thermal-conductivity substrates, embedded microchannel liquid cooling, solid-state active heat pumps, multi-physics co-design and advanced packaging manufacturing processes. The basic working principles and state-of-the-art research progress of each cooling technology are elaborated in detail. The common engineering bottlenecks, including ultra-high heat flux endurance, packaging process compatibility, fluid leakage risks and multi-layer interfacial thermal resistance, are summarized, and the future development trends of this field are clarified. This review can provide comprehensive theoretical guidance for structural design and large-scale engineering implementation of near-junction thermal management solutions for various high-power integrated processors, especially high-computing-power AI accelerators.
Xu et al. (Mon,) studied this question.
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