Threshold Voltage Instability of Enhancement-Mode GaN Buried p-Channel MOSFETs

GaN <tex-math notation="LaTeX">p </tex-math> -channel field-effect transistors ( <tex-math notation="LaTeX">p </tex-math> -FETs) are essential components for implementing the energy-efficient complementary logic circuitry for monolithic GaN power integration. This letter reports the threshold voltage ( <tex-math notation="LaTeX">VTH </tex-math> ) instability of <tex-math notation="LaTeX">p </tex-math> -channel GaN MOSFETs with Al 2 O 3 as the gate dielectric. When the gate-to-source bias sweeps toward the negative direction, the <tex-math notation="LaTeX">VTH </tex-math> exhibits a shift toward more negative values. The impacts of such <tex-math notation="LaTeX">VTH </tex-math> instability on GaN complementary logic circuits are characterized using logic inverters and ring oscillators. It is shown that impacts on circuit functions are limited with an operating voltage swing below 5 V. However, the propagation delay could be gradually prolonged, as a result of the drifting <tex-math notation="LaTeX">VTH </tex-math> .