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For the first time, we propose a stackable vertical channel-all-around (CAA) In–Ga–Zn-O field-effect transistor (IGZO FET) for high-density 4F² and long-retention 2T0C dynamic random access memory (DRAM) application. The device is fabricated in a back-end-of-line (BEOL) compatible process flow where the channel and gate-stack are deposited by plasma-enhanced atomic layer deposition (PEALD). The impact of IGZO cycle ratio and plasma power on the device’s electrical performance is studied. An optimized 50-nm channel-length CAA IGZO FET achieved <tex-math notation="LaTeX">ION > 30 ~μ A/μ m </tex-math> and <tex-math notation="LaTeX">IOFF </tex-math> below <tex-math notation="LaTeX">1.8×10 </tex-math>⁻¹⁷ <tex-math notation="LaTeX">μ A/μ m </tex-math> at <tex-math notation="LaTeX">VDS = 1 </tex-math> V. A long retention of 300 s has been experimentally verified for the CAA IGZO 2T0C bit cell, making it a potential candidate for low-power 2T0C DRAM with ultralow refresh frequency. Finally, by monolithically stacking the vertical CAA IGZO FETs with 130-nm critical dimension (CD) to form 2T0C bit cells, we demonstrate the feasibility of the proposed BEOL-compatible 2T0C DRAM for further density scaling beyond 4F².
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Duan et al. (2022) studied this question.
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