A 0.4V low-voltage, 12.8nW ultra-low-power wireless wake-up receiver

For low-power Internet of Things (IoT) applications, an envelope detector-first (ED-first) architecture ultra-low-power wake-up receiver in 65-nm CMOS technology is presented. Based on the analysis of the sensitivity constraint mechanism of this wake-up receiver architecture, a 5-orders passive differential envelope detector with high input impedance is introduced to replace the traditional active envelope detector, which was optimized to reduce power consumption and improve the sensitivity of the receiver. A common-mode feedback circuit detects the bias voltage of the current-reusing inverter-based BB amplifier, achieving regulation of the ED's common-mode level and BB amplifier bias, making the system insensitive to PVT variations. When operating at 850 MHz and receiving a 200 bps data rate wake-up signal, the receiver has a -74 dBm sensitivity with a 58 ms latency while consuming 12.8 nW from the 0.4 V supply, and the figure of merit (FoM) value is 145.9.