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We present a neural network (NN)-based transistor modeling framework, which includes drain, source, and gate currents and charges and their variabilities. The training data are generated by a Berkeley short-channel IGFET model (BSIM) with ranges of channel lengths, widths, and oxide thicknesses. The NNs are trained to learn the geometry dependence. The drain, source, and gate currents are modeled with one NN and the charges by another NN. The NNs are trained to produce accurate variability prediction and derivatives of currents and charges. Quality and robustness tests, such as Gummel symmetry, harmonic balance, and ring oscillator, are performed and show excellent results.
Tung et al. (Wed,) studied this question.