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Yield control in the integrated circuit manufacturing process is very important, and defects are one of the main factors affecting chip yield. As the process control becomes more and more critical and the critical dimension becomes smaller and smaller, the identification and location of defects is particularly important. This paper uses a machine learning algorithm based on transfer learning and two fine-tuned neural network models to realize the autonomous recognition and classification of defects even the data set is small, which achieves 94.6% and 91.7% classification accuracy. The influence of network complexity on classification result is studied at the same time. This paper also establishes a visual display algorithm of defects, shows the process of extracting the deep-level features of the defective image by the network, and then analyze the defect features. Finally, the Gradient-weighted Class Activation Mapping technology is used to generate defect heat maps, which locate the defect positions and probability intensity effects. This paper greatly expands the application of transfer learning in the field of integrated circuit lithography defect recognition, and greatly improves the friendliness of defect display.
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Liu et al. (2019) studied this question.
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