The behavior of misfit dislocations in InP/InGaAsP/InP double-heterostructure wafers grown by liquid phase epitaxy has been investigated by x-ray and photoluminescence (PL) topography. Misfit dislocations were found to be generated from the edges of all the wafers studied here. X-ray topographs for angle-polished wafers show that misfit dislocations exist within the upper InP layer and are located in close vicinity to the heterointerface. PL topography has been used to determine the misfit dislocation-free area within the wafers. This area decreases monotonically with the increase of the upper InP layer thickness, and is almost independent of the quaternary layer thickness. The lattice misfit is necessary to be in the range 0∼−0.08% at room temperature for making the area without misfit dislocations as wide as possible. Generation of misfit dislocations is considered to be strongly related to the ’’melt back’’ of the InGaAsP edge growth.
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Yamazaki et al. (1982) studied this question.
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