Room-temperature multiferroics such as Aurivillius-phase Bi 6 Ti 2.8 Fe 1.52 Mn 0.68 O 18 (B6TFMO, m = 5) combine ferroelectricity and ferrimagnetism, making them promising for next-generation memory and spintronic devices that exploit domain walls and magnetoelectric coupling. Naturally occurring defects, including out-of-phase boundaries (OPBs), stacking faults, and ‘anatase’-type intergrowths, profoundly influence local strain, electrostatics, and magnetic cation ordering, enabling charged domain walls, polar vortices, and enhanced magnetic interactions. However, their uncontrolled distribution undermines reproducibility across films. Here, we introduce vicinal sapphire substrates (0.2° to 10° miscut) as a powerful handle for engineering these defects during direct liquid injection chemical vapour deposition growth. Systematic increases in step density drive proliferation of OPB defects and stacking faults, along with grain refinement and x-ray diffraction peak broadening/asymmetry, while also triggering tilted (∼10°) b -axis polarisation vectors that enhance vertical polarisation accessibility. Atomic-resolution scanning transmission electron microscopy reveals OPB defects serving as heterogeneous nucleation sites for 180° nominally charged domain walls and polarisation patterns consistent with polar vortices (stabilised 3–5 nm apart). Nanorod precipitates within ‘anatase’-type interlayers stabilise novel anti-hedgehog polarisation configurations reminiscent of skyrmion-like topologies in Aurivillius phases. Critically, PFM uncovers a three-fold reduction in out-of-plane switching voltage (±5 V) for high-miscut films, enabled by selective c -axis response: ∼10° tilted grains rotate the in-plane b -axis polarisation vertical, while defect networks pin lateral domains and channel domain wall motion driven by local strain/electrostatic energy gradients. These findings establish substrate vicinality as a reproducible strategy to sculpt defect landscapes and directionally tune ferroelectric switching in Aurivillius multiferroics, paving the way for sustainable, low-voltage, scalable nanoelectronics with designer polar topologies.
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Colfer et al. (2026) studied this question.
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