Relationship between the interfacial ramped DC breakdown voltage and the morphology of the XLPE/SiR interface

Insulations enhanced with multilayer dielectrics are widely used in many applications. However, the interfaces between the dielectric layers are the weakest regions. Interfacial breakdown occurs frequently at the XLPE/SiR interfaces of DC cable joints or terminations. In this paper, an interface contact model is proposed to analyze the morphology of the XLPE/SiR interface, and the relationship between the interfacial ramped DC breakdown voltage and interface morphology is studied. Based on the interface contact model, the densities of real contact asperities and the percentages of the real contact area of XLPE/SiR interfaces under different levels of roughness and different interface pressures were calculated. Moreover, the interface contact model was verified by the results of an interface contact experiment. Interfacial DC breakdown tests were performed under different levels of roughness and different interface pressures. The interfacial ramped DC breakdown voltage increased from 20.37 to 36.05 kV with the grit number of the sandpaper used to sand the XLPE samples, i.e., 60, 150, 240, and 400. As the interface pressure increased from 0.1 to 0.5 MPa, the interfacial ramped DC breakdown voltage increased from 22.34 to 46.84 kV. The mechanism dictating the relationship between the interfacial ramped DC breakdown voltage and interface morphology was analyzed. The real contact area was considerably smaller than the nominal contact area, and many micro voids were present at the interfaces. These micro voids could be the main channel of interfacial breakdown, and the contact asperities could inhibit breakdown. A higher density and larger average area of real contact asperities results in more obstacles the breakdown encounters and causes the interfacial ramped DC breakdown voltage to be higher.