A quantum processor is a device with a data register and a program register. The input to the program register determines the operation, which is a completely positive linear map, that will be performed on the state in the data register. We develop a mathematical description for these devices, and apply it to several different examples of processors. The problem of finding a processor that will be able to implement a given set of mappings is also examined, and it is shown that, while it is possible to design a finite processor to realize the phase-damping channel, it is not possible to do so for the amplitude-damping channel.
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Hillery et al. (2002) studied this question.
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