We report an ultra-low-voltage RF receiver for applications in the 2.4 GHz band, designed in a 90 nm CMOS technology. The sliding-IF receiver prototype includes an LNA, an image-rejectLCfilter with single-ended to differential conversion, an RF mixer, anLCIF filter, a quadrature IF mixer, RF and IF LO buffers, and an I/Q baseband section with a VGA and a low-pass channel-select filter in each path, all integrated on-chip. It has a programmable overall gain of 30 dB, noise figure of 18 dB, out-of-channelIIP₃of-22 dBm. The 3.4 mm²chip consumes 8.5 mW from a 0.5 V supply.
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Stanić et al. (2008) studied this question.
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